Worth Data 520-RF Spécifications télécharger pdf (Page 9)

Si4730/31/34/35-D60

Rev. 1.2 9

Figure 2. 2-Wire Control Interface Read and Write Timing Parameters

Figure 3. 2-Wire Control Interface Read and Write Timing Diagram

SCLK

70%

30%

SDIO

70%

30%

START

STARTSTOP

t

f:IN

t

r:IN

t

LOW

t

HIGH

t

HD:STA

t

SU:STA

t

SU:STO

t

SP

t

BUF

t

SU:DAT

t

r:IN

t

HD:DAT

t

f:IN,

t

f:OUT

SCLK

SDIO

START STOPADDRESS + R/W ACK DATA ACK DATA ACK

A6-A0,

R/W

D7-D0 D7-D0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 41 42

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